Integrated circuits are widely used in consumer, commercial and many other applications. An integrated circuit includes a semiconductor die or chip which may be encapsulated. A lead frame may extend from the integrated circuit to facilitate the external connections to an integrated circuit mounting substrate. The mounting substrate may be a Printed Circuit Board (PCB).
In order to increase the density of integrated circuit packages, stack-type packages, where a plurality of chips are mounted inside an individual package, have been developed. As the thickness of electronic products containing the packages becomes thinner, smaller and/or lighter, it is desirable for the individual packages to become thinner.
Moreover, in order to increase the density of integrated circuit packages, it may be desirable to mount individual integrated circuits inside the printed circuit board. Accordingly, techniques for stacking individual packages vertically in and/or on the printed circuit board are being developed.
However, it is not easy to mount a plurality of stacked packages on the printed circuit board, while allowing acceptable Solder Joint Reliability (SJR) between the printed circuit board and the lead frame contained. More specifically, in the package structure, a conductive pattern formed on the printed circuit board and a lead frame contained in a package generally are bonded to each other by solder material therebetween. Because coefficients of thermal expansion are generally different between the printed circuit board and the lead frame, when heat is applied to the printed circuit board or the lead frame, the printed circuit board and the lead frame may expand differently. Thus, at the bonding region between the printed circuit board and the lead frame, problems such as crack creation frequently occur.
Moreover, when a plurality of integrated circuits are stacked on the printed circuit board, the thickness of the package generally increases due to the protruding integrated circuits on the surface of the printed circuit board. In attempts to provide thinner integrated circuits, very very thin exposed lead frame package (WELP) packages with bendless lead frames, and Thin Small Outline Package (TSOP) packages have been developed. Because the WELP-type package does not have any bent shape in the lead frame reaching from the package mold to the bonding region, it may not have sufficient compliance of the lead frame. Thus, compensation of the difference of coefficients of thermal expansion between the printed circuit board and the lead frame may not be attainable. Therefore, bonding failure between the circuit board and the lead frame may occur.
Finally, even if a plurality of integrated circuits are stacked vertically on a printed circuit board, lead frames inputting and outputting signals to the packages may be connected to one another, and thereby, each stacked package may not be operated individually at the same time. Therefore, operating speed of each package which is mounted on the printed circuit board may become slow.